Two next-generation desktop platforms gave something away this week without either vendor announcing anything. AMD's kernel patches put the first numbers on a Zen 6 core type that has never appeared in a shipping product, and Intel's own engineering parts store now pairs the LGA1954 socket with the Nova Lake desktop platform by name.
Zen 6 client parts get a third core tier
Zen 6 client processors are being prepared for three core types rather than two: full performance cores, dense efficiency cores, and a new low-power core. AMD's Mario Limonciello posted a CPPC patch series to the Linux kernel mailing list that hard-codes a maximum frequency for each type, because Zen 6 client platforms use CPPC differently from previous AMD parts and the kernel needs a per-core-type ceiling to run its capacity calculations (Phoronix on the CPPC patches). The values are 5025 for the performance core, 3524 for the dense efficiency core, and 2399 for the low-power core, which places the low-power core at 0.47x the performance core and 0.68x the dense one.
Those ratios are the first concrete indication of where the new tier sits, and they should be held loosely. The patches describe the numbers as placeholders until a future ACPI revision adds a proper interface for reading a core type's maximum frequency, one hard-coded set covers every Zen 6 client in the Model 80 series, and nothing in them says how much power the low-power core actually saves, which is the figure that decides whether the tier earns its area. A frequency ratio is also not an IPC ratio. Two core types can share an architecture and still land in very different places on a performance-per-watt curve. That gap is the reason for building a third one.
The scheduling side is where this matters in practice. The patches missed the Linux 7.3 merge window and target 7.4, following the Zen 6 desktop enablement and EPP tuning already queued, so a distribution kernel that treats a three-tier Zen 6 correctly is a 7.4-or-later proposition rather than something to expect from a kernel shipping today.
Intel's parts store ties LGA1954 to Nova Lake-S
Intel's Design-In Tools store lists an "ILM Kit for the LGA1954 NVL-S Interposer for the Gen5 VR Test Tool", the first time the socket and Intel's internal shorthand for desktop Nova Lake have appeared together on an Intel-operated site (VideoCardz on the listing). The kit is voltage-regulator validation hardware, some of it restricted to approved companies, and not a product announcement. None of the surrounding detail is new either: LGA1954 turned up in shipping records more than a year ago, and cooler makers including Corsair and Asetek already list compatibility with it.
What the listing settles is the pairing, and that is the part with a purchase attached to it. LGA1954 replaces the LGA1851 socket used by Arrow Lake-S and is expected to arrive with Intel's 900-series desktop chipsets, so an LGA1851 board bought now should be priced as the last Intel generation it will ever hold. Whether LGA1954 does better on socket lifespan is still unconfirmed: Intel VP Robert Hallock said in March that he sees a future where Intel sockets support more CPU generations, without naming LGA1954 or committing to a count (VideoCardz on socket lifespan). Roadmaps putting three or four generations on the socket remain leaks.
EXPO ULL reaches a mainstream AM5 kit
G.Skill's Flare X5X is a DDR5-6000 32GB kit built from two 16GB modules, running 36-36-36-96 at 1.35V, which is exactly what the existing Flare X5 runs. The difference is AMD's EXPO ULL profile underneath, tightening subtimings that no spec sheet prints (Tom's Hardware on the Flare X5X). On paper the two kits are indistinguishable, so the badge is the only thing separating them at the point of ordering.
The gain is aimed at Ryzen parts without 3D V-Cache, where memory latency has more influence on frame times than it does on a chip carrying a large L3 to absorb it. G.Skill has not announced pricing, and it already sells more aggressive EXPO ULL configurations at 26-36-36-32, 28-36-36-32, and 30-38-38-32, so a tighter Flare X5X later is plausible rather than promised.
The one item here that touches a purchase this week is that memory badge, and it does so in an irritating way: on AM5, EXPO ULL is the only visible marker for subtimings the printed timing string does not report. The rest is platform readout. It matters when the question is how much life is left in a socket before spending on a board.